A NEW HARDWARE ARCHITECTURE FOR FPGA IMPLEMENTATION OF FEED FORWARD NEURAL NETWORK
DOI:
https://doi.org/10.61841/x28aj909Keywords:
Feed forward neural network, FFNN, systolic hardware architecture, FPGA implementationAbstract
New chips for machine learning applications appear, they are turned for specific topology being efficient by using highly parallel designs at the cost of high power or large complex devices. Although, the computational demands of deep neural networks require flexible and efficient hardware architectures able to fit different applications, neural network types, number of inputs, outputs, layers and units in each layer , making the conversion from software to hardware easy.
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